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» Optimizing for parallelism and data locality
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HPCA
2009
IEEE
16 years 7 months ago
Optimizing communication and capacity in a 3D stacked reconfigurable cache hierarchy
Cache hierarchies in future many-core processors are expected to grow in size and contribute a large fraction of overall processor power and performance. In this paper, we postula...
Niti Madan, Li Zhao, Naveen Muralimanohar, Anirudd...
CASES
2003
ACM
15 years 12 months ago
Architectural optimizations for low-power, real-time speech recognition
The proliferation of computing technology to low power domains such as hand–held devices has lead to increased interest in portable interface technologies, with particular inter...
Rajeev Krishna, Scott A. Mahlke, Todd M. Austin
CAD
2006
Springer
15 years 6 months ago
Constrained 3D shape reconstruction using a combination of surface fitting and registration
We investigate 3D shape reconstruction from measurement data in the presence of constraints. The constraints may fix the surface type or set geometric relations between parts of a...
Yang Liu, Helmut Pottmann, Wenping Wang
JSSPP
1997
Springer
15 years 10 months ago
An Experimental Evaluation of Processor Pool-Based Scheduling for Shared-Memory NUMA Multiprocessors
In this paper we describe the design, implementation and experimental evaluation of a technique for operating system schedulers called processor pool-based scheduling [51]. Our tec...
Tim Brecht
IPPS
2007
IEEE
16 years 29 days ago
Automatic MPI application transformation with ASPhALT
This paper describes a source to source compilation tool for optimizing MPI-based parallel applications. This tool is able to automatically apply a “prepushing” transformation...
Anthony Danalis, Lori L. Pollock, D. Martin Swany