Sciweavers

1276 search results - page 61 / 256
» Optimizing Hierarchical Schedules for Improved Control Perfo...
Sort
View
CASES
2006
ACM
16 years 5 days ago
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitr...
ICESS
2007
Springer
16 years 10 days ago
Intra Routing Protocol with Hierarchical and Distributed Caching in Nested Mobile Networks
Abstract. We propose a novel route optimization protocol for intraNEMO communication using a hierarchical and distributed caching scheme. The proposed scheme employs the routing ca...
Hyemee Park, Moonseong Kim, Hyunseung Choo
LCTRTS
2001
Springer
15 years 10 months ago
Evaluating and Optimizing Thread Pool Strategies for Real-Time CORBA
Strict control over the scheduling and execution of processor resources is essential for many fixed-priority real-time applications. To facilitate this common requirement, the Re...
Irfan Pyarali, Marina Spivak, Ron Cytron, Douglas ...
CDC
2009
IEEE
114views Control Systems» more  CDC 2009»
15 years 11 months ago
Design of optimal switching surfaces for switched autonomous systems
Abstract— This paper presents a novel, computationally feasible procedure for computing optimal switching surfaces, i.e. optimal feedback controllers for switched autonomous nonl...
Axel Schild, Xu Chu Ding, Magnus Egerstedt, Jan Lu...
MICRO
2005
IEEE
144views Hardware» more  MICRO 2005»
15 years 11 months ago
A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance
Dynamic voltage and frequency scaling (DVFS) is an effective technique for controlling microprocessor energy and performance. Existing DVFS techniques are primarily based on hardw...
Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vi...