3206 search results - page 195 / 642 » Optimizing Graph Algorithms for Improved Cache Performance |
193
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MOBIHOC
2004
ACM
15 years 12 months ago
2004
ACM
In this work, we develop an analytical framework to investigate the behavior of the communication links of a node in a random mobility environment. Analytical expressions characte...
158
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CGF
2008
15 years 6 months ago
2008
We present the Memory Trace Visualizer (MTV), a tool that provides interactive visualization and analysis of the sequence of memory operations performed by a program as it runs. A...
191
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CASES
2006
ACM
16 years 15 days ago
2006
ACM
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
204
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IEEECGIV
2005
IEEE
16 years 3 days ago
2005
IEEE
Creating a 3-D game engine is not a trivial task as gamers often demand for high quality output with top notch performance in games. In this paper, we show you how various real-ti...
176
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TKDE
2002
15 years 6 months ago
2002
In this paper, we have developed a HiTi (Hierarchical MulTi) graph model for structuring large topographical road maps to the minimum cost route computation. The HiTi graph model p...