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ICCD
2004
IEEE
137views Hardware» more  ICCD 2004»
16 years 3 months ago
Comparative Study of Strategies for Formal Verification of High-Level Processors
Compared are different methods for evaluation of formulas expressing microprocessor correctness in the logic of Equality with Uninterpreted Functions and Memories (EUFM) by transl...
Miroslav N. Velev
ICCD
2002
IEEE
140views Hardware» more  ICCD 2002»
16 years 3 months ago
Fitted Elmore Delay: A Simple and Accurate Interconnect Delay Model
— In this paper, we present a new interconnect delay model called Fitted Elmore delay (FED). FED is generated by approximating Hspice delay data using a curve fitting technique....
Arif Ishaq Abou-Seido, Brian Nowak, Chris C. N. Ch...
ICCD
2002
IEEE
88views Hardware» more  ICCD 2002»
16 years 3 months ago
Improving Processor Performance by Simplifying and Bypassing Trivial Computations
During the course of a program’s execution, a processor performs many trivial computations; that is, computations that can be simplified or where the result is zero, one, or equ...
Joshua J. Yi, David J. Lilja
ICCAD
2007
IEEE
140views Hardware» more  ICCAD 2007»
16 years 3 months ago
Thermal-aware Steiner routing for 3D stacked ICs
— In this paper, we present the first work on the Steiner routing for 3D stacked ICs. In the 3D Steiner routing problem, the pins are located in multiple device layers, which ma...
Mohit Pathak, Sung Kyu Lim
ICCAD
2007
IEEE
125views Hardware» more  ICCAD 2007»
16 years 3 months ago
A methodology for timing model characterization for statistical static timing analysis
While the increasing need for addressing process variability in sub-90nm VLSI technologies has sparkled a large body of statistical timing and optimization research, the realizati...
Zhuo Feng, Peng Li
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