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ICCAD
2006
IEEE
103views Hardware» more  ICCAD 2006»
16 years 4 months ago
A statistical framework for post-silicon tuning through body bias clustering
Adaptive body biasing (ABB) is a powerful technique that allows post-silicon tuning of individual manufactured dies such that each die optimally meets the delay and power constrai...
Sarvesh H. Kulkarni, Dennis Sylvester, David Blaau...
ICCAD
2006
IEEE
112views Hardware» more  ICCAD 2006»
16 years 4 months ago
A new RLC buffer insertion algorithm
Most existing buffering algorithms neglect the impact of inductance on circuit performance, which causes large error in circuit analysis and optimization. Even for the approaches...
Zhanyuan Jiang, Shiyan Hu, Jiang Hu, Zhuo Li, Weip...
ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
16 years 4 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
16 years 4 months ago
Flip-flop insertion with shifted-phase clocks for FPGA power reduction
— Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops...
Hyeonmin Lim, Kyungsoo Lee, Youngjin Cho, Naehyuck...
ICCAD
2003
IEEE
117views Hardware» more  ICCAD 2003»
16 years 4 months ago
On Whitespace and Stability in Mixed-Size Placement and Physical Synthesis
In the context of physical synthesis, large-scale standard-cell placement algorithms must facilitate incremental changes to layout, both local and global. In particular, flexible...
Saurabh N. Adya, Igor L. Markov, Paul Villarrubia
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