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DATE
2005
IEEE
155views Hardware» more  DATE 2005»
16 years 5 days ago
Studying Storage-Recomputation Tradeoffs in Memory-Constrained Embedded Processing
Fueled by an unprecedented desire for convenience and self-service, consumers are embracing embedded technology solutions that enhance their mobile lifestyles. Consequently, we wi...
Mahmut T. Kandemir, Feihui Li, Guilin Chen, Guangy...
DEXAW
2005
IEEE
151views Database» more  DEXAW 2005»
16 years 5 days ago
An Overlay Network for Resource Discovery in Grids
As Grids try to achieve optimal and balanced utilization of unused resources in a distributed system, fast and efficient discovery of resource states is a key requirement. For sm...
Manfred Hauswirth, Roman Schmidt
FOCS
2005
IEEE
16 years 5 days ago
Towards a Final Analysis of Pairing Heaps
Fredman, Sedgewick, Sleator, and Tarjan proposed the pairing heap as a self-adjusting, streamlined version of the Fibonacci heap. It provably supports all priority queue operation...
Seth Pettie
HOTI
2005
IEEE
16 years 5 days ago
SIFT: Snort Intrusion Filter for TCP
Intrusion rule processing in reconfigurable hardware enables intrusion detection and prevention services to run at multi Gigabit/second rates. High-level intrusion rules mapped d...
Michael Attig, John W. Lockwood
ICCAD
2005
IEEE
98views Hardware» more  ICCAD 2005»
16 years 5 days ago
An architecture and a wrapper synthesis approach for multi-clock latency-insensitive systems
— This paper presents an architecture and a wrapper synthesis approach for the design of multi-clock systems-on-chips. We build upon the initial work on multi-clock latency-insen...
Ankur Agiwal, Montek Singh
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