711 search results - page 122 / 143 » Optimal placement by branch-and-price |
166
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ISCAS
2006
IEEE
16 years 3 days ago
2006
IEEE
– Increasing logic densities and clock frequencies on FPGAs lead to rapid increase in power density, which translates to higher on-chip temperature. In this paper, we investigate...
165
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INFOCOM
2005
IEEE
15 years 11 months ago
2005
IEEE
—The presence of heterogeneous nodes (i.e., nodes with an enhanced energy capacity or communication capability) in a sensor network is known to increase network reliability and l...
153
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INFOVIS
2005
IEEE
15 years 11 months ago
2005
IEEE
The paper describes a novel technique to visualize graphs with extended node and link labels. The lengths of these labels range from a short phrase to a full sentence to an entire...
165
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ISQED
2005
IEEE
15 years 11 months ago
2005
IEEE
Hierarchical approach greatly facilitates large-scale chip design by hiding distracting details in low-level objects. However, the lowlevel designs have to have a global view of h...
149
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ISPD
2005
ACM
15 years 11 months ago
2005
ACM
Research in floorplanning and block-packing has generated a variety of data structures to represent spatial configurations of circuit modules. Much of this work focuses on the g...