Sciweavers

3020 search results - page 413 / 604
» Optimal partition trees
Sort
View
ASPDAC
2004
ACM
113views Hardware» more  ASPDAC 2004»
15 years 10 months ago
Area-minimal algorithm for LUT-based FPGA technology mapping with duplication-free restriction
- Minimum area is one of the important objectives in technology mapping for lookup table-based FPGAs. It has been proven that the problem is NP-complete. This paper presents a poly...
Chi-Chou Kao, Yen-Tai Lai
DATE
2004
IEEE
147views Hardware» more  DATE 2004»
15 years 10 months ago
Automatic Tuning of Two-Level Caches to Embedded Applications
The power consumed by the memory hierarchy of a microprocessor can contribute to as much as 50% of the total microprocessor system power, and is thus a good candidate for optimiza...
Ann Gordon-Ross, Frank Vahid, Nikil Dutt
FPGA
2008
ACM
191views FPGA» more  FPGA 2008»
15 years 8 months ago
A hardware framework for the fast generation of multiple long-period random number streams
Stochastic simulations and other scientific applications that depend on random numbers are increasingly implemented in a parallelized manner in programmable logic. High-quality ps...
Ishaan L. Dalal, Deian Stefan
DAGSTUHL
2007
15 years 8 months ago
Weighted Voronoi Region Algorithms for Political Districting
Automated political districting shares with electronic voting the aim of preventing electoral manipulation and pursuing an impartial electoral mechanism. Political districting can...
Bruno Simeone, Federica Ricca, Andrea Scozzari
IASTEDSEA
2004
15 years 8 months ago
Java bytecode verification with dynamic structures
Java applets run on a Virtual Machine that checks code's integrity and correctness before execution using a module called Bytecode Verifier. Java Card technology allows Java ...
Cinzia Bernardeschi, Luca Martini, Paolo Masci