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IPPS
1998
IEEE
15 years 10 months ago
Partitioned Schedules for Clustered VLIW Architectures
This paper presents results on a new approach to partitioning a modulo-scheduled loop for distributed execution on parallel clusters of functional units organized as a VLIW machin...
Marcio Merino Fernandes, Josep Llosa, Nigel P. Top...
ASPDAC
2000
ACM
109views Hardware» more  ASPDAC 2000»
15 years 10 months ago
A technique for QoS-based system partitioning
Quality of service (QoS) has been an important topic of many research communities. Combined with an advanced and retargetable compiler, variability of applicationsspecific very lar...
Johnson S. Kin, Chunho Lee, William H. Mangione-Sm...
ICCAD
2010
IEEE
166views Hardware» more  ICCAD 2010»
15 years 4 months ago
Low-power clock trees for CPUs
Clock networks contribute a significant fraction of dynamic power and can be a limiting factor in high-performance CPUs and SoCs. The need for multi-objective optimization over a l...
Dongjin Lee, Myung-Chul Kim, Igor L. Markov
DAC
2005
ACM
16 years 7 months ago
Physically-aware HW-SW partitioning for reconfigurable architectures with partial dynamic reconfiguration
Many reconfigurable architectures offer partial dynamic configurability, but current system-level tools cannot guarantee feasible implementations when exploiting this feature. We ...
Sudarshan Banerjee, Elaheh Bozorgzadeh, Nikil D. D...
IPPS
2008
IEEE
16 years 27 days ago
Parallel performance wizard: A performance analysis tool for partitioned global-address-space programming
Given the complexity of parallel programs, developers often must rely on performance analysis tools to help them improve the performance of their code. While many tools support th...
Hung-Hsun Su, Max Billingsley, Alan D. George