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» Optimal design in collaborative design network
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SLIP
2009
ACM
16 years 1 months ago
Prediction of high-performance on-chip global interconnection
Different interconnection structures have been proposed to solve the performance limitation caused by scaling of on-chip global wires. In this paper, we give an overview of curre...
Yulei Zhang, Xiang Hu, Alina Deutsch, A. Ege Engin...
ICNP
2007
IEEE
16 years 1 months ago
A Performance Study of Loss Detection/Recovery in Real-world TCP Implementations
— TCP is the dominant transport protocol used in the Internet and its performance fundamentally governs the performance of Internet applications. It is well-known that packet los...
Sushant Rewaskar, Jasleen Kaur, F. Donelson Smith
ISLPED
2005
ACM
85views Hardware» more  ISLPED 2005»
16 years 11 days ago
A low-power crossroad switch architecture and its core placement for network-on-chip
As the number of cores on a chip increases, power consumed by the communication structures takes significant portion of the overall power-budget. The individual components of the...
Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen
SLIP
2003
ACM
16 years 1 days ago
Error-correction and crosstalk avoidance in DSM busses
Aggressive process scaling and increasing clock rates have made crosstalk noise an important issue in VLSI design. Switching on adjacent wires on long bus lines can increase delay...
Ketan N. Patel, Igor L. Markov
ATAL
2007
Springer
16 years 1 months ago
SSDPOP: improving the privacy of DCOP with secret sharing
Multi-agent systems designed to work collaboratively with groups of people typically require private information that people will entrust to them only if they have assurance that ...
Rachel Greenstadt, Barbara J. Grosz, Michael D. Sm...