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ICANN
2005
Springer
16 years 2 days ago
A Real-Time, FPGA Based, Biologically Plausible Neural Network Processor
Abstract. A real-time, large scale, leaky-integrate-and-fire neural network processor realized using FPGA is presented. This has been designed, as part of a collaborative project,...
Martin J. Pearson, Ian Gilhespy, Kevin N. Gurney, ...
ICDCN
2009
Springer
15 years 4 months ago
Large-Scale Networked Systems: From Anarchy to Geometric Self-structuring
Abstract. We define geometric self-structuring in a large-scale networked system as the ability of the participating nodes to collaboratively impose a geometric structure to the ne...
Anne-Marie Kermarrec, Achour Mostéfaoui, Mi...
PEWASUN
2004
ACM
15 years 12 months ago
A routing protocol for power constrained networks with asymmetric links
In many instances, an ad hoc network consists of nodes with different hardware and software capabilities as well as power limitations. This is the case of ad hoc grids where devi...
Guoqiang Wang, Yongchang Ji, Dan C. Marinescu, Dam...
GECCO
2009
Springer
16 years 1 months ago
An evolutionary approach to planning IEEE 802.16 networks
Efficient and effective deployment of IEEE 802.16 networks to service an area of users with certain traffic demands is an important network planning problem. We resort to an evol...
Ting Hu, Yuanzhu Peter Chen, Wolfgang Banzhaf, Rob...
ADHOCNOW
2005
Springer
16 years 3 days ago
Cache Placement in Sensor Networks Under Update Cost Constraint
— In this paper, we address an optimization problem that arises in context of cache placement in sensor networks. In particular, we consider the cache placement problem where the...
Bin Tang, Samir R. Das, Himanshu Gupta