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DAC
2002
ACM
16 years 8 months ago
Efficient code synthesis from extended dataflow graphs for multimedia applications
This paper presents efficient automatic code synthesis techniques from dataflow graphs for multimedia applications. Since multimedia applications require large size buffers contai...
Hyunok Oh, Soonhoi Ha
ICCAD
2006
IEEE
189views Hardware» more  ICCAD 2006»
16 years 3 months ago
Allocation cost minimization for periodic hard real-time tasks in energy-constrained DVS systems
Energy-efficiency and power-awareness for electronic systems have been important design issues in hardware and software implementations. We consider the scheduling of periodic ha...
Jian-Jia Chen, Tei-Wei Kuo
ICCAD
2003
IEEE
138views Hardware» more  ICCAD 2003»
16 years 3 months ago
Multi-Million Gate FPGA Physical Design Challenges
The recent past has seen a tremendous increase in the size of design circuits that can be implemented in a single FPGA. These large design sizes significantly impact cycle time du...
Maogang Wang, Abhishek Ranjan, Salil Raje
AFRICACRYPT
2010
Springer
16 years 1 months ago
ECC2K-130 on Cell CPUs
This paper describes an implementation of Pollard’s rho algorithm to compute the elliptic curve discrete logarithm for the Synergistic Processor Elements of the Cell Broadband En...
Joppe W. Bos, Thorsten Kleinjung, Ruben Niederhage...
DATE
2009
IEEE
133views Hardware» more  DATE 2009»
16 years 1 months ago
SecBus: Operating System controlled hierarchical page-based memory bus protection
—This paper presents a new two-levels page-based memory bus protection scheme. A trusted Operating System drives a hardware cryptographic unit and manages security contexts for e...
Lifeng Su, Stephan Courcambeck, Pierre Guillemin, ...
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