261 search results - page 16 / 53 » Optimal Hardware Pattern Generation for Functional BIST |
178
click to vote
VLSISP
2008
15 years 5 months ago
2008
In this paper we describe a regular expression pattern matching approach for reconfigurable hardware. Following a Non-deterministic Finite Automata direction, we introduce three ne...
142
click to vote
ITC
2003
IEEE
15 years 11 months ago
2003
IEEE
Failure analysis (FA) and diagnosis of memory cores plays a key role in system-on-chip (SOC) product development and yield ramp-up. Conventional FA based on bitmaps and the experi...
157
click to vote
CASES
2000
ACM
15 years 10 months ago
2000
ACM
In this paper, we describe a software architecture supporting code generation from within Ptolemy II. Ptolemy II is a componentbased design tool intended for embedded and real-tim...
177
click to vote
ISQED
2011
IEEE
14 years 9 months ago
2011
IEEE
Due to the dramatic increase in design complexity, verifying the functional correctness of a circuit is becoming more difficult. Therefore, bugs may escape all verification effo...
142
click to vote
ATS
2003
IEEE
15 years 11 months ago
2003
IEEE
Recent probabilistic test generation approaches have proven that detecting single stuck-at faults multiple times is effective at reducing the defective part level (DPL). Unfortuna...