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HPCA
2005
IEEE
16 years 7 months ago
On the Limits of Leakage Power Reduction in Caches
If current technology scaling trends hold, leakage power dissipation will soon become the dominant source of power consumption in high performance processors. Caches, due to the f...
Yan Meng, Timothy Sherwood, Ryan Kastner
HPCA
2003
IEEE
16 years 7 months ago
Dynamic Data Dependence Tracking and its Application to Branch Prediction
To continue to improve processor performance, microarchitects seek to increase the effective instruction level parallelism (ILP) that can be exploited in applications. A fundament...
Lei Chen, Steve Dropsho, David H. Albonesi
HPCA
2003
IEEE
16 years 7 months ago
Exploring the VLSI Scalability of Stream Processors
Stream processors are high-performance programmable processors optimized to run media applications. Recent work has shown these processors to be more area- and energy-efficient th...
Brucek Khailany, William J. Dally, Scott Rixner, U...
HPCA
2002
IEEE
16 years 7 months ago
Quantifying Load Stream Behavior
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...
Suleyman Sair, Timothy Sherwood, Brad Calder
STOC
2002
ACM
121views Algorithms» more  STOC 2002»
16 years 7 months ago
Average case analysis for batched disk scheduling and increasing subsequences
We consider the problem of estimating the tour length and finding approximation algorithms for the asymmetric traveling salesman problem arising from the disk scheduling problem. ...
Eitan Bachmat
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