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DATE
2003
IEEE
131views Hardware» more  DATE 2003»
15 years 12 months ago
High Speed and Highly Testable Parallel Two-Rail Code Checker
In this article we propose a high speed and highly testable parallel two-rail code checker, which features a compact structure and is Totally-Self-Checking or Strongly Code-Disjoi...
Martin Omaña, Daniele Rossi, Cecilia Metra
DFT
2003
IEEE
120views VLSI» more  DFT 2003»
15 years 12 months ago
Implementation and Testing of Fault-Tolerant Photodiode-Based Active Pixel Sensor (APS)
The implementation of imaging arrays for System-On-a-Chip (SOC) is aided by using faulttolerant light sensors. Fault-tolerant redundancy in an Active Pixel Sensor (APS) is obtaine...
Sunjaya Djaja, Glenn H. Chapman, Desmond Y. H. Che...
DSD
2003
IEEE
69views Hardware» more  DSD 2003»
15 years 12 months ago
A VLIW Architecture for Logarithmic Arithmetic
The Logarithmic Number System (LNS) is an alternative to IEEE-754 standard floating-point arithmetic. LNS multiply, divide and square root are easier than IEEE-754 and naturally ...
Mark G. Arnold
HICSS
2003
IEEE
112views Biometrics» more  HICSS 2003»
15 years 12 months ago
Applying the Task-Technology Fit Model to WWW-based Procurement: Conceptualization and Measurement
This research examines the application of the tasktechnology fit (TTF) model to World Wide Web (WWW) usage for electronic commerce (EC) purposes. Conducted from corporate buyersâ€...
Younes Benslimane, Michel Plaisent, Prosper Bernar...
HICSS
2003
IEEE
123views Biometrics» more  HICSS 2003»
15 years 12 months ago
Issues in Rational Planning in Multi-Agent Settings
We adopt the decision-theoretic principle of expected utility maximization as a paradigm for designing autonomous rational agents operating in multi-agent environments. We use the...
Piotr J. Gmytrasiewicz
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