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ISCAS
2007
IEEE
104views Hardware» more  ISCAS 2007»
16 years 1 months ago
Reduction of Register File Delay Due to Process Variability in VLIW Embedded Processors
Process variation in future technologies can cause severe performance degradation since different parts of the shared Register File (RF) in VLIW processors may operate at various ...
Praveen Raghavan, José L. Ayala, David Atie...
ISCAS
2007
IEEE
123views Hardware» more  ISCAS 2007»
16 years 1 months ago
Low-Power Low-Voltage Hot-Spot Tolerant Clocking with Suppressed Skew
— A methodology based on supply voltage optimization for lowering the power consumption and temperature fluctuations induced skew of clock distribution networks is proposed in th...
Sherif A. Tawfik, Volkan Kursun
ISVLSI
2007
IEEE
121views VLSI» more  ISVLSI 2007»
16 years 1 months ago
Data Recovery Block Design for Impulse Modulated Power Line Communications in a Microprocessor
Power line communications (PLC) using impulse ultra wideband (UWB) in a microprocessor had been proposed for ubiquitous access of internal nodes for test/debug purposes. In this p...
Rajesh Thirugnanam, Dong Sam Ha, T. M. Mak
RTSS
2007
IEEE
16 years 1 months ago
Static-Priority Scheduling over Wireless Networks with Multiple Broadcast Domains
We propose a wireless medium access control (MAC) protocol that provides static-priority scheduling of messages in a guaranteed collision-free manner. Our protocol supports multip...
Nuno Pereira, Björn Andersson, Eduardo Tovar,...
SIBGRAPI
2007
IEEE
16 years 1 months ago
Data Hiding for Binary Documents Robust to Print-Scan, Photocopy and Geometric Distortions
This paper presents a data hiding technique for printed bicolor documents. It inserts tiny dots, hardly noticeable at normal reading distance, to embed the message. For message ex...
Hae Yong Kim, Joceli Mayer
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