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DATE
2009
IEEE
126views Hardware» more  DATE 2009»
16 years 1 months ago
Fast and accurate protocol specific bus modeling using TLM 2.0
—The need to have Transaction Level models early in the design cycle is becoming more and more important to shorten the development times of complex Systems-on-Chip (SoC). These ...
H. W. M. van Moll, Henk Corporaal, Víctor R...
EDOC
2009
IEEE
16 years 1 months ago
Using Enterprise Architecture Management Patterns to Complement TOGAF
—The design of an Enterprise Architecture (EA) management function for an enterprise is no easy task. Various frameworks exist as well as EA management tools, which promise to de...
Sabine Buckl, Alexander M. Ernst, Florian Matthes,...
WCRE
2009
IEEE
16 years 1 months ago
An Empirical Study on Inconsistent Changes to Code Clones at Release Level
—Current research on code clones tries to address the question whether or not code clones are harmful for the quality of software. As most of these studies are based on the fine...
Nicolas Bettenburg, Weiyi Shang, Walid Ibrahim, Br...
KBSE
2009
IEEE
16 years 1 months ago
Code Completion from Abbreviated Input
—Abbreviation Completion is a novel technique to improve the efficiency of code-writing by supporting code completion of multiple keywords based on non-predefined abbreviated inp...
Sangmok Han, David R. Wallace, Robert C. Miller
RTSS
2009
IEEE
16 years 1 months ago
Timing Analysis of Concurrent Programs Running on Shared Cache Multi-Cores
—Memory accesses form an important source of timing unpredictability. Timing analysis of real-time embedded software thus requires bounding the time for memory accesses. Multipro...
Yan Li, Vivy Suhendra, Yun Liang, Tulika Mitra, Ab...