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ATS
2001
IEEE
137views Hardware» more  ATS 2001»
15 years 11 months ago
Compaction Schemes with Minimum Test Application Time
Testing embedded cores in a System-on-a-chip necessitates the use of a Test Access Mechanism, which provides for transportation of the test data between the chip and the core I/Os...
Ozgur Sinanoglu, Alex Orailoglu
EUROGP
2000
Springer
177views Optimization» more  EUROGP 2000»
15 years 10 months ago
Register Based Genetic Programming on FPGA Computing Platforms
The use of FPGA based custom computing platforms is proposed for implementing linearly structured Genetic Programs. Such a context enables consideration of micro architectural and ...
Malcolm I. Heywood, A. Nur Zincir-Heywood
ICLP
1995
Springer
15 years 10 months ago
WAMCC: Compiling Prolog to C
We present the wamcc system, a Prolog compiler that translates Prolog to C via the WAM. This approach has some interesting consequences: simplicity, efficiency, portability, exten...
Philippe Codognet, Daniel Diaz
BMVC
2001
15 years 9 months ago
Deformable Spatio-Temporal Shape Models: Extending ASM to 2D+Time
This paper extends 2D Active Shape Models to 2D+time by presenting a method for modelling and segmenting spatio-temporal shapes (ST-shapes). The modelling part consists of constru...
Ghassan Hamarneh, Tomas Gustavsson
AAAI
2007
15 years 9 months ago
Randomized Adaptive Spatial Decoupling for Large-Scale Vehicle Routing with Time Windows
In recent years, the size of combinatorial applications and the need to produce high-quality solutions quickly have increased steadily, providing significant challenges for optim...
Russell Bent, Pascal Van Hentenryck