The need to reduce the power consumption of the next generation of digital systems is clearly recognized. At the system level, power management is a very powerful technique and de...
The language AML is used to specify the semantics of architecture description languages, ADLs. It is a very primitive language, having declarations for only three constructs: elem...
FaCT (Fast Classification of Terminologies) is a Description Logic (DL) classifier that can also be used for modal logic satisfiability testing. The FaCT system includes two reason...
High-level power estimation, when given only a high-level design specification such as a functional or RTL description, requires high-level estimation of the circuit average acti...
Matching problems in Description Logics are theoretically well understood, with a variety of algorithms available for different DLs. Nevertheless, still no implementation of a ge...