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ISLPED
1999
ACM
131views Hardware» more  ISLPED 1999»
15 years 10 months ago
Challenges in clockgating for a low power ASIC methodology
Gating the clock is an important technique used in low power design to disable unused modules of a circuit. Gating can save power by both preventing unnecessary activiiy in the lo...
David Garrett, Mircea R. Stan, Alvar Dean
HIPC
2007
Springer
15 years 10 months ago
Accomplishing Approximate FCFS Fairness Without Queues
First Come First Served (FCFS) is a policy that is accepted for implementing fairness in a number of application domains such as scheduling in Operating Systems, scheduling web req...
K. Subramani, Kamesh Madduri
DAC
2008
ACM
16 years 7 months ago
Variation-adaptive feedback control for networks-on-chip with multiple clock domains
This paper discusses the use of networks-on-chip (NoCs) consisting of multiple voltage-frequency islands to cope with power consumption, clock distribution and parameter variation...
Ümit Y. Ogras, Diana Marculescu, Radu Marcule...
DAC
2006
ACM
16 years 7 months ago
Timing driven power gating
Power Gating is effective for reducing leakage power. Previously, a Distributed Sleep Transistor Network (DSTN) was proposed to reduce the sleep transistor area by connecting all ...
De-Shiuan Chiou, Shih-Hsin Chen, Shih-Chieh Chang,...
SIGCOMM
2005
ACM
15 years 12 months ago
OpenDHT: a public DHT service and its uses
Large-scale distributed systems are hard to deploy, and distributed hash tables (DHTs) are no exception. To lower the barriers facing DHT-based applications, we have created a pub...
Sean C. Rhea, Brighten Godfrey, Brad Karp, John Ku...