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» On-chip logic minimization

133

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FSTTCS
2003
Springer

64views Software Engineering» more FSTTCS 2003»

Minimality Results for the Spatial Logics

15 years 11 months ago

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Daniel Hirschkoff, Étienne Lozes, Davide Sa...

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134

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VLSID
1998
IEEE

88views VLSI» more VLSID 1998»

A Fast Two-level Logic Minimizer

15 years 10 months ago

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P. Srinivasa Rao, James Jacob

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129

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DAC
1993
ACM

109views Computer Architecture» more DAC 1993»

Espresso-Signature: A New Exact Minimizer for Logic Functions

15 years 10 months ago

Download www2.engr.arizona.edu

Patrick C. McGeer, Jagesh V. Sanghavi, Robert K. B...

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152

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ICCAD
1992
IEEE

109views Hardware» more ICCAD 1992»

Exact two-level minimization of hazard-free logic with multiple-input changes

15 years 10 months ago

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Steven M. Nowick, David L. Dill

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129

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VLSID
1995
IEEE

109views VLSI» more VLSID 1995»

Logic minimization based approach for compressing image data

15 years 9 months ago

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