66 search results - page 6 / 14 » On-Chip Inductance in X Architecture Enabled Design |
163
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FPL
2009
Springer
15 years 10 months ago
2009
Springer
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
148
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ICECCS
2005
IEEE
15 years 11 months ago
2005
IEEE
This paper articulates a system design for the secure role based messaging model built based on existing messaging systems, public key infrastructures, and a privilege management ...
139
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DAC
2007
ACM
16 years 7 months ago
2007
ACM
Off-chip decoupling capacitor (decap) allocation is a demanding task during package and chip codesign. Existing approaches can not handle large numbers of I/O counts and large num...
132
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ISSS
2002
IEEE
15 years 11 months ago
2002
IEEE
Message-passing mechanism is commonly used to preserve data coherency in distributed systems. This paper presents an algorithm for insertion of minimal message-passing in system-l...
158
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ICCAD
2007
IEEE
16 years 2 months ago
2007
IEEE
—In this paper, we introduce a novel reconfigurable architecture, named 3D nFPGA, which utilizes 3D integration techniques and new nanoscale materials synergistically. The propos...