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DATE
2003
IEEE
127views Hardware» more  DATE 2003»
16 years 2 days ago
Exploring High Bandwidth Pipelined Cache Architecture for Scaled Technology
In this paper we propose a design technique to pipeline cache memories for high bandwidth applications. With the scaling of technology cache access latencies are multiple clock cy...
Amit Agarwal, Kaushik Roy, T. N. Vijaykumar
DATE
2003
IEEE
109views Hardware» more  DATE 2003»
16 years 2 days ago
Run-Time Management of Logic Resources on Reconfigurable Systems
Dynamically reconfigurable systems based on partial and dynamically reconfigurable FPGAs may have their functionality partially modified at run-time without stopping the operation...
Manuel G. Gericota, Gustavo R. Alves, Miguel L. Si...
DATE
2003
IEEE
104views Hardware» more  DATE 2003»
16 years 2 days ago
Efficient Field Processing Cores in an Innovative Protocol Processor System-on-Chip
We present an innovative protocol processor component that combines wire-speed processing for low-level, and best effort processing for higher-level protocols. The component is a ...
George Lykakis, N. Mouratidis, Kyriakos Vlachos, N...
DSN
2003
IEEE
16 years 2 days ago
Compiler-Directed Program-Fault Coverage for Highly Available Java Internet Services
Abstract: We present a new approach that uses compilerdirected fault-injection for coverage testing of recovery code in Internet services to evaluate their robustness to operating ...
Chen Fu, Richard P. Martin, Kiran Nagaraja, Thu D....
HICSS
2003
IEEE
112views Biometrics» more  HICSS 2003»
16 years 2 days ago
Applying the Task-Technology Fit Model to WWW-based Procurement: Conceptualization and Measurement
This research examines the application of the tasktechnology fit (TTF) model to World Wide Web (WWW) usage for electronic commerce (EC) purposes. Conducted from corporate buyersâ€...
Younes Benslimane, Michel Plaisent, Prosper Bernar...
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