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» On time-scale designs for networks
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NOCS
2007
IEEE
16 years 1 months ago
Implementation and Evaluation of a Dynamically Routed Processor Operand Network
— Microarchitecturally integrated on-chip networks, or micronets, are candidates to replace busses for processor component interconnect in future processor designs. For micronets...
Paul Gratz, Karthikeyan Sankaralingam, Heather Han...
DATE
2006
IEEE
352views Hardware» more  DATE 2006»
16 years 25 days ago
Fast-prototyping using the BTnode platform
The BTnode platform is a versatile and flexible platform for functional prototyping of ad hoc and sensor networks. Based on an Atmel microcontroller, a Bluetooth radio and a low-...
Jan Beutel
IPTPS
2004
Springer
16 years 4 days ago
DHT Routing Using Social Links
— The equality and anonymity of peer-to-peer networks makes them vulnerable to routing denial of service attacks from misbehaving nodes. In this paper, we investigate how existin...
Sergio Marti, Prasanna Ganesan, Hector Garcia-Moli...
ICNP
1998
IEEE
15 years 11 months ago
Evaluating the Overheads of Source-Directed Quality-of-Service Routing
Quality-of-service (QoS) routing satisfiesapplication performance requirements and optimizes network resource usage but effective path-selection schemes require the distribution o...
Anees Shaikh, Jennifer Rexford, Kang G. Shin
ASIAMS
2007
IEEE
16 years 1 months ago
XMulator: A Listener-Based Integrated Simulation Platform for Interconnection Networks
Simulation is perhaps the most cost-effective tool to evaluate the operation of a system under design. A flexible, easy to extend, fully object-oriented, and multilayered simulato...
Abbas Nayebi, Sina Meraji, Arash Shamaei, Hamid Sa...