11348 search results - page 336 / 2270 » On time-scale designs for networks |
347
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Lecture Notes
"This course will consist of a number of major sections. The first will be a short review of some preliminary material, including asymptotics, summations, and recurrences and ...
160
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DAC
2007
ACM
16 years 7 months ago
2007
ACM
Off-chip decoupling capacitor (decap) allocation is a demanding task during package and chip codesign. Existing approaches can not handle large numbers of I/O counts and large num...
177
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VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
Interconnection networks in Systems-On-Chip begin to have a non-negligible impact on the power consumption of a whole system. This is because of increasing inter-wire capacitances...
215
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CISIS
2009
IEEE
2009
IEEE
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints
16 years 1 months ago
—Regular multi-core processors are appearing in the embedded system market as high performance software programmable solutions. The use of regular interconnect fabrics for them a...
158
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INFOCOM
2009
IEEE
16 years 1 months ago
2009
IEEE
—It is well-known that the overall efficiency of a distributed system can suffer if the participating entities seek to maximize their individual performance. Consequently, mecha...