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ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
16 years 3 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
ACSC
2009
IEEE
16 years 1 months ago
ALARM: An Adaptive Load-Aware Routing Metric for Hybrid Wireless Mesh Networks
Abstract— Hybrid Wireless Mesh Networks (WMN) are generally employed to establish communication during disaster recovery operations. The Hybrid WMN network is formed in a spontan...
Asad Amir Pirzada, Ryan Wishart, Marius Portmann, ...
SC
2009
ACM
16 years 1 months ago
Early performance evaluation of a "Nehalem" cluster using scientific and engineering applications
In this paper, we present an early performance evaluation of a 624-core cluster based on the Intel® Xeon® Processor 5560 (code named “Nehalem-EP”, and referred to as Xeon 55...
Subhash Saini, Andrey Naraikin, Rupak Biswas, Davi...
CCS
2009
ACM
16 years 1 months ago
Secure in-VM monitoring using hardware virtualization
Kernel-level attacks or rootkits can compromise the security of an operating system by executing with the privilege of the kernel. Current approaches use virtualization to gain hi...
Monirul I. Sharif, Wenke Lee, Weidong Cui, Andrea ...
OTM
2009
Springer
16 years 25 days ago
Evaluating Transport Protocols for Real-Time Event Stream Processing Middleware and Applications
Real-time event stream processing (RT-ESP) applications must synchronize continuous data streams despite fluctuations in resource availability. Satisfying these needs of RT-ESP ap...
Joe Hoffert, Douglas C. Schmidt, Aniruddha S. Gokh...