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PDP
2009
IEEE
16 years 27 days ago
Phoenix: A Runtime Environment for High Performance Computing on Chip Multiprocessors
Abstract—Execution of applications on upcoming highperformance computing (HPC) systems introduces a variety of new challenges and amplifies many existing ones. These systems will...
Avneesh Pant, Hassan Jafri, Volodymyr V. Kindraten...
ICCD
2006
IEEE
117views Hardware» more  ICCD 2006»
16 years 3 months ago
System-Level Energy Modeling for Heterogeneous Reconfigurable Chip Multiprocessors
—Field-Programmable Gate Array (FPGA) technology is characterized by continuous improvements that provide new opportunities in system design. Multiprocessors-ona-Programmable-Chi...
Xiaofang Wang, Sotirios G. Ziavras
CASES
2001
ACM
15 years 9 months ago
A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture
The rapid growth of silicon densities has made it feasible to deploy reconfigurable hardware as a highly parallel computing platform. However, in most cases, the application needs...
Girish Venkataramani, Walid A. Najjar, Fadi J. Kur...
RTSS
2006
IEEE
16 years 3 days ago
Run-Time Services for Hybrid CPU/FPGA Systems on Chip
Modern FPGA devices, which include (multiple) processor core(s) as diffused IP on the silicon die, provide an excellent platform for developing custom multiprocessor systems-on-pr...
Jason Agron, Wesley Peck, Erik Anderson, David L. ...
CN
2004
109views more  CN 2004»
15 years 6 months ago
Architectures and protocols for mobile computing applications: a reconfigurable approach
This work deals with reconfigurable control functions and protocols for supporting mobile computing applications in heterogeneous wireless systems like cellular networks and WLANs...
Carla-Fabiana Chiasserini, Francesca Cuomo, Leonar...