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» On the power of coercion abstraction
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ICCD
2006
IEEE
124views Hardware» more  ICCD 2006»
16 years 3 months ago
Customizable Fault Tolerant Caches for Embedded Processors
Abstract— The continuing divergence of processor and memory speeds has led to the increasing reliance on larger caches which have become major consumers of area and power in embe...
Subramanian Ramaswamy, Sudhakar Yalamanchili
ICCAD
2007
IEEE
137views Hardware» more  ICCAD 2007»
16 years 3 months ago
Combining static and dynamic defect-tolerance techniques for nanoscale memory systems
Abstract— Nanoscale technology promises dramatically increased device density, but also decreased reliability. With bit error rates projected to be as high as 10%, designing a us...
Susmit Biswas, Gang Wang, Tzvetan S. Metodi, Ryan ...
ICCAD
2007
IEEE
123views Hardware» more  ICCAD 2007»
16 years 3 months ago
Mapping model with inter-array memory sharing for multidimensional signal processing
Abstract – The storage requirements in data-intensive signal processing systems (including applications in video and image processing, artificial vision, medical imaging, real-t...
Ilie I. Luican, Hongwei Zhu, Florin Balasa
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
16 years 3 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna
SOFSEM
2009
Springer
16 years 3 months ago
Expressiveness of Multiple Heads in CHR
Abstract. Constraint Handling Rules (CHR) is a general purpose, committedchoice declarative language which, differently from other similar languages, uses multi-headed (guarded) ru...
Cinzia Di Giusto, Maurizio Gabbrielli, Maria Chiar...