This paper presents a method to reduce the complexity of a linear or linearized (small-signal) analog circuit. The reduction technique, based on quality-error ranking, can be used...
Walter Daems, Georges G. E. Gielen, Willy M. C. Sa...
This paper deals with the automatic dependability analysis of systems designed using UML. An automatic transformations is defined for the generation of models to capture systems d...
This paper describes a new design methodology to analyze the on-chip power supply noise for high performance microprocessors. Based on an integrated package-level and chip-level p...
The efficiency of mergesortprogramsis analysed under a simple unit-cost model. In our analysis the time performance of the sorting programs includes the costs of key comparisons, e...
Genetic regulatory networks have been modeled as discrete transition systems by many approaches, benefiting from a large number of formal verification algorithms available for the ...