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VLSID
2003
IEEE
253views VLSI» more  VLSID 2003»
16 years 6 months ago
High Level Synthesis from Sim-nML Processor Models
The design of modern complex embedded systems require a high level of abstraction of the design. The SimnML[1] is a specification language to model processors for such designs. Se...
Souvik Basu, Rajat Moona
DCC
2004
IEEE
16 years 6 months ago
Parameter Inequalities for Orthogonal Arrays with Mixed Levels
An important question in the construction of orthogonal arrays is what the minimal size of an array is when all other parameters are fixed. In this paper, we will provide a genera...
Wiebke S. Diestelkamp
SETN
2010
Springer
16 years 1 months ago
A Feasibility Study on Low Level Techniques for Improving Parsing Accuracy for Spanish Using Maltparser
In the last years dependency parsing has been accomplished by machine learning–based systems showing great accuracy but usually under 90% for Labelled Attachment Score (LAS). Mal...
Miguel Ballesteros, Jesús Herrera, Virginia...
3DIC
2009
IEEE
146views Hardware» more  3DIC 2009»
16 years 1 months ago
A routerless system level interconnection network for 3D integrated systems
- This paper describes a new architectural paradigm for fully connected, single-hop system level interconnection networks. The architecture is scalable enough to meet the needs of ...
Kelli Ireland, Donald M. Chiarulli, Steven P. Levi...
AINA
2009
IEEE
16 years 1 months ago
Modeling Web Request and Session Level Arrivals
This paper is focused on modeling Web request and session level arrival processes. We propose a statistically rigorous approach which includes testing for non-stationarity and Gau...
Xuan Wang, Katerina Goseva-Popstojanova