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DATE
2006
IEEE
110views Hardware» more  DATE 2006»
16 years 14 days ago
Layout driven data communication optimization for high level synthesis
High level synthesis transformations play a major part in shaping the properties of the final circuit. However, most optimizations are performed without much knowledge of the fina...
Ryan Kastner, Wenrui Gong, Xin Hao, Forrest Brewer...
DATE
2006
IEEE
147views Hardware» more  DATE 2006»
16 years 14 days ago
Quantitative analysis of transaction level models for the AMBA bus
The increasing complexity of embedded systems pushes system designers to higher levels of abstraction. Transaction Level Modeling (TLM) has been proposed to model ation in systems...
Gunar Schirner, Rainer Dömer
DSD
2006
IEEE
110views Hardware» more  DSD 2006»
16 years 14 days ago
A Flexible, Syntax Independent Representation (SIR) for System Level Design Models
System Level Design (SLD) is widely seen as a solution for bridging the gap between chip complexity and design productivity of Systems on Chip (SoC). SLD relieves the designer fro...
Ines Viskic, Rainer Dömer
MM
2006
ACM
157views Multimedia» more  MM 2006»
16 years 11 days ago
Syllabic level automatic synchronization of music signals and text lyrics
We present a framework to synchronize pop music to corresponding text lyric. We refine line level alignment achievable by existing work to syllabic level by using a dynamic progra...
Denny Iskandar, Ye Wang, Min-Yen Kan, Haizhou Li
CGO
2005
IEEE
16 years 1 days ago
Practical and Accurate Low-Level Pointer Analysis
Pointer analysis is traditionally performed once, early in the compilation process, upon an intermediate representation (IR) with source-code semantics. However, performing pointe...
Bolei Guo, Matthew J. Bridges, Spyridon Triantafyl...