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144
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ISVLSI
2005
IEEE
113views VLSI» more  ISVLSI 2005»
16 years 13 days ago
Balancing System Level Pipelines with Stage Voltage Scaling
This paper presents an approach to dynamically balance the pipeline by scaling the stage supply voltages. Simulation results show that by such an approach about 50% improvement in...
Hui Guo, Sri Parameswaran
ISVLSI
2005
IEEE
95views VLSI» more  ISVLSI 2005»
16 years 13 days ago
System Level Methodology for Programming CMP Based Multi-Threaded Network Processor Architectures
Vijaykumar Ramamurthi, Jason McCollum, Christopher...
MMM
2005
Springer
159views Multimedia» more  MMM 2005»
16 years 13 days ago
Region-Based Image Retrieval with High-Level Semantic Color Names
Performance of traditional content-based image retrieval systems is far from user’s expectation due to the ‘semantic gap’ between low-level visual features and the richness ...
Ying Liu, Dengsheng Zhang, Guojun Lu, Wei-Ying Ma
163
Voted
MSS
2005
IEEE
112views Hardware» more  MSS 2005»
16 years 13 days ago
Violin: A Framework for Extensible Block-Level Storage
Storage virtualization is becoming more and more important due to the increasing gap between application requirements and the limited functionality offered by storage systems. In...
Michail Flouris, Angelos Bilas
MTV
2005
IEEE
81views Hardware» more  MTV 2005»
16 years 13 days ago
Search-Space Optimizations for High-Level ATPG
Our mutation based validation paradigm (MVP) is a validation environment for high-level microprocessor implementations. To be able to efficiently identify and analyze the architec...
Jorge Campos, Hussain Al-Asaad