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ICCAD
2003
IEEE
16 years 3 months ago
2003
IEEE
On-chip L1 and L2 caches represent a sizeable fraction of the total power consumption of microprocessors. In deep sub-micron technology, the subthreshold leakage power is becoming...
208
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ICCAD
2003
IEEE
16 years 3 months ago
2003
IEEE
—While array structures are a significant source of power dissipation, there is a lack of accurate high-level power estimators that account for varying array circuit implementat...
163
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ICCAD
2003
IEEE
16 years 3 months ago
2003
IEEE
This paper presents an efficient method for verifying hazard freedom in timed asynchronous circuits. Timed circuits are a class of asynchronous circuits that utilize explicit tim...
156
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ICCAD
2001
IEEE
16 years 3 months ago
2001
IEEE
The aim of this work is to provide an elegant and accurate static execution timing model for 32-bit microprocessor instruction sets, covering also inter–instruction effects. Suc...
ICCAD
2001
IEEE
16 years 3 months ago
2001
IEEE