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141
Voted
VLSID
2003
IEEE
2003
IEEE
High Level Modeling and Validation Methodologies for Embedded Systems: Bridging the Productivity Gap
16 years 7 months ago
191
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VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
: In this paper, we present a point-to-point (P2P) communication synthesis methodology for SystemOn-Chip (SOC) design. We consider real-time systems where IP selection, mapping and...
181
Voted
VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
Clock selection has a significant impact on the performance and quality of designs in high-level synthesis. In most synthesis systems, a convenient value of the clock is chosen or...
219
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HPCA
2008
IEEE
16 years 7 months ago
2008
IEEE
Portable, embedded systems place ever-increasing demands on high-performance, low-power microprocessor design. Dynamic voltage and frequency scaling (DVFS) is a well-known techniq...