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ISSS
2002
IEEE
124views Hardware» more  ISSS 2002»
15 years 11 months ago
A New Performance Evaluation Approach for System Level Design Space Exploration
Application specific systems have potential for customization of design with a view to achieve a better costperformance-power trade-off. Such customization requires extensive de...
M. Balakrishnan, Anshul Kumar, C. P. Joshi
153
Voted
ISSS
2002
IEEE
176views Hardware» more  ISSS 2002»
15 years 11 months ago
Controller Estimation for FPGA Target Architectures during High-Level Synthesis
In existing synthesis systems, the influence of the area and delay of the controller is not or not sufficiently taken into account. But the controller can have a big influence,...
Oliver Bringmann, Wolfgang Rosenstiel, Carsten Men...
EMSOFT
2001
Springer
15 years 11 months ago
Using Multiple Levels of Abstractions in Embedded Software Design
ltiple Levels of Abstractions in Embedded Software Design Jerry R. Burch1, Roberto Passerone1, and Alberto L. Sangiovanni-Vincentelli2 1 Cadence Berkeley Laboratories, Berkeley CA ...
Jerry R. Burch, Roberto Passerone, Alberto L. Sang...
FPL
2001
Springer
96views Hardware» more  FPL 2001»
15 years 11 months ago
System Level Tools for DSP in FPGAs
Abstract. Visual data ow environments are ideally suited for modeling digital signal processing (DSP) systems, as many DSP algorithms are most naturally speci ed by signal ow gra...
James Hwang, Brent Milne, Nabeel Shirazi, Jeffrey ...
ACSAC
2000
IEEE
15 years 11 months ago
History-based Distributed Filtering - A Tagging Approach to Network-Level Access Control
This contribution discusses a network-level access control technique that applies the non-discretionary access control model to individual data packets that are exchanged between ...
Reiner Sailer, M. Kabatnik