This paper presents a practical approach to communication synthesis for hardware/software system specified as tasks communicating through lossless blocking channels. It relies on ...
1 The function level evolvable hardware approach to synthesize the combinational multiple-valued and binary logic functions is proposed in rst time. The new representation of logic...
This paper presents a system level design methodology and its implementation as CAD tool for the optimization of heterogeneous multiprocessor systems. These heterogeneous systems,...
We present a functional DBPL in the style of FP that facilitates the definition of precise semantics and opens up opportunities for far-reaching optimizations. The language is int...
Multi-level transactions are a variant of open nested transactions in which the subtransactions correspond to operations at different levels of a layered system architecture. The ...