Abstract. In a trace-based world, the modular speci cation, veri cation, and control of live systems require each module to be receptive that is, each module must be able to meet i...
Data locality and synchronization overhead are two important factors that affect the performance of applications on multiprocessors. Loop fusion is an effective way for reducing s...
Edwin Hsing-Mean Sha, Chenhua Lang, Nelson L. Pass...
Programmable logic architectures increase in capacity before commercial circuits are designed for them, yielding a distinct problem for FPGA vendors: how to test and evaluate the ...
Michael D. Hutton, Jonathan Rose, Derek G. Corneil
Learnability in Valiant’s PAC learning model has been shown to be strongly related to the existence of uniform laws of large numbers. These laws define a distribution-free conver...
In this paper, we study the simultaneousdriver and wire sizing (SDWS) problem under two objective functions: (i) delay minimization only, or (ii) combined delay and power dissipat...