With rapid advances in VLSI technology, Field Programmable Gate Arrays (FPGAs) are receiving the attention of the Parallel and High Performance Computing community. In this paper,...
Uday Bondhugula, Ananth Devulapalli, Joseph Fernan...
We present a coarse grained parallel algorithm for computing a maximum matching in a convex bipartite graph G = A;B;E. For p processors with N=p memory per processor, N = jAj+jBj,...
Prosenjit Bose, Albert Chan, Frank K. H. A. Dehne,...
This paper proposes a method for reducing the maximum degree of vertices in graphs that maintain optimal broadcast time when a vertex can call a vertex at distance at most k durin...
Optamzztng compalataon as very amportant for generatang code sequentes an order to utalaze the characterastacs of processor archatectures. One of the most essentaal optzmazataon t...
d Abstract) Richard J. Anderson Paul Beame Walter L. Ruzzo Department of Computer Science and Engineering University of Washingtoni We introduce a task scheduling model which is u...