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ISCAS
1999
IEEE
110views Hardware» more  ISCAS 1999»
15 years 10 months ago
Noise-tolerant dynamic circuit design
-- Noise in deep submicron technology combined with the move towards dynamic circuit techniques for higher performance have raised concerns about reliability and energyefficiency o...
Lei Wang, Naresh R. Shanbhag
TVLSI
2010
15 years 1 months ago
Design and Implementation of a Sort-Free K-Best Sphere Decoder
:- This paper describes the design and VLSI architecture for a 4x4 breadth first K-Best MIMO decoder using a 64 QAM scheme. A novel sort free approach to path extension, as well as...
Sudip Mondal, Ahmed M. Eltawil, Chung-An Shen, Kha...
FORMATS
2007
Springer
16 years 21 days ago
On the Expressiveness of MTL Variants over Dense Time
The basic modal operator bounded until of Metric Temporal Logic (MTL) comes in several variants. In particular it can be strict (when it does not constrain the current instant) or...
Carlo A. Furia, Matteo Rossi
VTS
2005
IEEE
116views Hardware» more  VTS 2005»
16 years 3 days ago
Closed-Form Simulation and Robustness Models for SEU-Tolerant Design
— A closed-form model for simulation and analysis of voltage transients caused by single-event upsets (SEUs) in logic circuits is described. A linear RC model, derived using a SP...
Kartik Mohanram
GMP
2000
IEEE
138views Solid Modeling» more  GMP 2000»
15 years 11 months ago
On Optimal Tolerancing in Computer-Aided Design
A geometric approach to the computation of precise or well approximated tolerance zones for CAD constructions is given. We continue a previous study of linear constructions and fr...
Helmut Pottmann, Boris Odehnal, Martin Peternell, ...