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ASYNC
2002
IEEE
120views Hardware» more  ASYNC 2002»
15 years 11 months ago
Relative Timing Based Verification of Timed Circuits and Systems
Advanced clock-delayed1 and self-resetting domino circuits are becoming increasingly important design styles in aggressive synchronous as well as asynchronous design. Their design...
Peter A. Beerel, Ken S. Stevens, Hoshik Kim
IV
2005
IEEE
156views Visualization» more  IV 2005»
15 years 12 months ago
Applying Graphical Design Techniques to Graph Visualisation
This paper contains details of new criteria for graph layout, based on the concepts used in graphical design. Current graph layout criteria have been shown to be effective in meas...
Martyn Taylor, Peter Rodgers
CODES
1996
IEEE
15 years 10 months ago
Partitioning and Exploration Strategies in the TOSCA Co-Design Flow
The TaSCA environment for hardware/software co-design of control dominated systems implemented on a single chip includes a novel approach to the system exploration phase for the e...
Alessandro Balboni, William Fornaciari, Donatella ...
CSCW
2000
ACM
15 years 6 months ago
A Tale of Two Toolkits: Relating Infrastructure and Use in Flexible CSCW Toolkits
The design of software toolkits embodies a fundamental tension. On the one hand, it aims to reduce programmer effort by providing prefabricated, reusable software modules encapsula...
Paul Dourish, W. Keith Edwards
WWW
2009
ACM
16 years 7 months ago
Measuring the similarity between implicit semantic relations from the web
Measuring the similarity between semantic relations that hold among entities is an important and necessary step in various Web related tasks such as relation extraction, informati...
Danushka Bollegala, Yutaka Matsuo, Mitsuru Ishizuk...