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ISCAS
2003
IEEE
79views Hardware» more  ISCAS 2003»
16 years 3 days ago
Design of a low power psycho-acoustic model co-processor for MPEG-2/4 AAC LC stereo encoder
A new design of Psycho-Acoustic Model in MPEG-214 AAC encoding is proposed. Differing from the conventional PC-based and DSP-based encoders, it was based on hybrid architectures. ...
Tsung-Han Tsai, Shih-Way Huang, Liang-Gee Chen
ISCAS
2003
IEEE
83views Hardware» more  ISCAS 2003»
16 years 3 days ago
An Integrated Framework of Design Optimization and Space Minimization for DSP applications
This paper presents an Integrated Framework of Design Optimization and Space Minimization (IDOM) for generating the minimum number of functional units with schedule length and mem...
Qingfeng Zhuge, Edwin Hsing-Mean Sha, Chantana Cha...
ISQED
2003
IEEE
303views Hardware» more  ISQED 2003»
16 years 3 days ago
Design and Analysis of Low-Voltage Current-Mode Logic Buffers
- This paper investigates important problems involved in the design of a CML buffer as well as a chain of tapered CML buffers. A new design procedure to systematically design a cha...
Payam Heydari
MICRO
2003
IEEE
161views Hardware» more  MICRO 2003»
16 years 3 days ago
Design and Implementation of High-Performance Memory Systems for Future Packet Buffers
In this paper we address the design of a future high-speed router that supports line rates as high as OC-3072 (160 Gb/s), around one hundred ports and several service classes. Bui...
Jorge García-Vidal, Jesús Corbal, Ll...
DAC
2003
ACM
16 years 2 days ago
Test generation for designs with multiple clocks
To improve the system performance, designs with multiple clocks have become more and more popular. In this paper, several novel test generation procedures are proposed to utilize ...
Xijiang Lin, Rob Thompson
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