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139
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DATE
2000
IEEE
15 years 11 months ago
2000
IEEE
Delay defects on I/O pads, interconnections of a board, or interconnections among embedded cores can not be tested with the current IEEE 1149.1 boundary scan design. This paper in...
143
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ICRA
2000
IEEE
15 years 11 months ago
2000
IEEE
The synthesis theory for spatial linkage systems can be formulated in a way that is compatible with the geometric design of serial and parallel chain robotic systems. Mechanism de...
152
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ASPDAC
2000
ACM
15 years 11 months ago
2000
ACM
– This paper presents a novel circuit design technique to reduce the power dissipation in sequential circuits by generating a quasi-synchronous derived clock from the master cloc...
145
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SIGCSE
2000
ACM
15 years 11 months ago
2000
ACM
We propose an object-oriented (OO) formulation and implementation of lazy/delayed evaluation by reusing and extending an existing linear recursive structure (LRS) framework with t...
190
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DL
2000
Springer
15 years 11 months ago
2000
Springer
This paper describes preliminary work carried out to design a children’s digital library of stories and poems with and for children aged 11-14 years old. We describe our experie...