In this paper, we investigate the power implications of tile size selection for tile-based processors. We refer to this investigation as a tile granularity study. This is accompli...
John Oliver, Ravishankar Rao, Michael Brown, Jenni...
Optimally choosing operating parameters for access points in an enterprise wireless LAN environment is a difficult and well-studied problem. Unlike past work, the SMARTA self-man...
— This paper is interested in reward maximization of periodic real-time tasks under a given energy constraint, where the reward received depends on how much computation a task ru...
High mask and production costs for the newest CMOS silicon technologies increase the pressure to develop hardware platforms useable for different applications or variants of the s...
Christian Panis, Ulrich Hirnschrott, Gunther Laure...
Current trends suggest that the number of memory chips per processor chip will increase at least a factor of ten in seven years. This will make DRAM cost, the space and the power i...