Sciweavers

7197 search results - page 371 / 1440
» On the computational power of BlenX
Sort
View
CF
2006
ACM
16 years 24 days ago
Tile size selection for low-power tile-based architectures
In this paper, we investigate the power implications of tile size selection for tile-based processors. We refer to this investigation as a tile granularity study. This is accompli...
John Oliver, Ravishankar Rao, Michael Brown, Jenni...
CONEXT
2006
ACM
16 years 24 days ago
SMARTA: a self-managing architecture for thin access points
Optimally choosing operating parameters for access points in an enterprise wireless LAN environment is a difficult and well-studied problem. Unlike past work, the SMARTA self-man...
Nabeel Ahmed, Srinivasan Keshav
RTSS
2005
IEEE
16 years 12 days ago
Voltage Scaling Scheduling for Periodic Real-Time Tasks in Reward Maximization
— This paper is interested in reward maximization of periodic real-time tasks under a given energy constraint, where the reward received depends on how much computation a task ru...
Jian-Jia Chen, Tei-Wei Kuo
SAC
2004
ACM
16 years 8 days ago
DSPxPlore: design space exploration methodology for an embedded DSP core
High mask and production costs for the newest CMOS silicon technologies increase the pressure to develop hardware platforms useable for different applications or variants of the s...
Christian Panis, Ulrich Hirnschrott, Gunther Laure...
WMPI
2004
ACM
16 years 8 days ago
A case for multi-level main memory
Current trends suggest that the number of memory chips per processor chip will increase at least a factor of ten in seven years. This will make DRAM cost, the space and the power i...
Magnus Ekman, Per Stenström