Sciweavers

7197 search results - page 328 / 1440
» On the computational power of BlenX
Sort
View
ARITH
2001
IEEE
15 years 10 months ago
Computer Arithmetic-A Processor Architect's Perspective
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
Ruby B. Lee
TCS
1998
15 years 6 months ago
Dynamical Recognizers: Real-Time Language Recognition by Analog Computers
We consider a model of analog computation which can recognize various languages in real time. We encode an input word as a point in Rd by composing iterated maps, and then apply i...
Cristopher Moore
SPAA
2010
ACM
15 years 7 months ago
Scheduling to minimize power consumption using submodular functions
We develop logarithmic approximation algorithms for extremely general formulations of multiprocessor multiinterval offline task scheduling to minimize power usage. Here each proce...
Erik D. Demaine, Morteza Zadimoghaddam
168
Voted
IEICET
2008
106views more  IEICET 2008»
15 years 6 months ago
Realization of Low Power High-Speed Channel Filters with Stringent Adjacent Channel Attenuation Specifications for Wireless Comm
Finite impulse response (FIR) filtering is the most computationally intensive operation in the channelizer of a wireless communication receiver. Higher order FIR channel filters a...
Jimson Mathew, R. Mahesh, A. Prasad Vinod, Edmund ...
SIGOPS
2008
100views more  SIGOPS 2008»
15 years 5 months ago
Power management in the EPOS system
Power management strategies for embedded systems typically rely on static, application driven deactivation of components (e.g. sleep, suspend), or on dynamic voltage and frequency...
Geovani Ricardo Wiedenhoft, Lucas Francisco Wanner...