We propose a generic algorithmic model called STAMP (Synchronous, Transactional, and Asynchronous MultiProcessing) as a universal performance and power complexity model for multit...
Speed scaling is a power management technique that involves dynamically changing the speed of a processor. We study policies for setting the speed of the processor for both of the ...
We provide a translation from CTL to Datalog¬ Succ. The translation has the following advantages: a) It is natural. b) It provides intuition to the expressive power of CTL and it...
Foto N. Afrati, Theodore Andronikos, Vassia Pavlak...
We investigate the computational power of parallel models with directed reconfigurable buses and with shared memory. Based on feasibility considerations present in the literature,...
We introduce a generic extension of the popular branching-time logic CTL which refines the temporal until and release operators with formal languages. For instance, a language may ...
Roland Axelsson, Matthew Hague, Stephan Kreutzer, ...