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FPGA
2008
ACM
163views FPGA» more  FPGA 2008»
15 years 8 months ago
TORCH: a design tool for routing channel segmentation in FPGAs
A design tool for routing channel segmentation in islandstyle FPGAs is presented. Given the FPGA architecture parameters and a set of benchmark designs, the tool optimizes routing...
Mingjie Lin, Abbas El Gamal
ISLPED
2007
ACM
96views Hardware» more  ISLPED 2007»
15 years 8 months ago
Low-power process-variation tolerant arithmetic units using input-based elastic clocking
In this paper we propose a design methodology for low-power, high-performance, process-variation tolerant architecture for arithmetic units. The novelty of our approach lies in th...
Debabrata Mohapatra, Georgios Karakonstantis, Kaus...
ASAP
2010
IEEE
143views Hardware» more  ASAP 2010»
15 years 8 months ago
Loop transformations for interface-based hierarchies IN SDF graphs
Data-flow has proven to be an attractive computation model for programming digital signal processing (DSP) applications. A restricted version of data-flow, termed synchronous data...
Jonathan Piat, Shuvra S. Bhattacharyya, Mickaë...
AAAI
2010
15 years 7 months ago
Dealing with Infinite Loops, Underestimation, and Overestimation of Depth-First Proof-Number Search
Depth-first proof-number search (df-pn) is powerful AND/OR tree search to solve positions in games. However, df-pn has a notorious problem of infinite loops when applied to domain...
Akihiro Kishimoto
BIS
2007
144views Business» more  BIS 2007»
15 years 7 months ago
Automated Integration Tests for Mobile Applications in Java 2 Micro Edition
Applications written for mobile devices have become more and more complex, adjusting to the constantly improving computational power of hardware. With the growing application size ...
Dawid Weiss, Marcin Zduniak
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