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ASPLOS
2010
ACM
15 years 9 months ago
Micro-pages: increasing DRAM efficiency with locality-aware data placement
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...
Kshitij Sudan, Niladrish Chatterjee, David Nellans...
ASPDAC
2008
ACM
104views Hardware» more  ASPDAC 2008»
15 years 8 months ago
Variability-driven module selection with joint design time optimization and post-silicon tuning
Abstract-- Increasing delay and power variation are significant challenges to the designers as technology scales to the deep sub-micron (DSM) regime. Traditional module selection t...
Feng Wang 0004, Xiaoxia Wu, Yuan Xie
CODES
2008
IEEE
15 years 8 months ago
Profiling of lossless-compression algorithms for a novel biomedical-implant architecture
In view of a booming market for microelectronic implants, our ongoing research work is focusing on the specification and design of a novel biomedical microprocessor core targeting...
Christos Strydis, Georgi Gaydadjiev
AGI
2008
15 years 7 months ago
Engineering Utopia
The likely advent of AGI and the long-established trend of improving computational hardware promise a dual revolution in coming decades: machines which are both more intelligent an...
J. Storrs Hall
MASCOTS
2008
15 years 7 months ago
Network Information Flow in Network of Queues
Two classic categories of models exist for computer networks: network information flow and network of queues. The network information flow model appropriately captures the multi-ho...
Phillipa Gill, Zongpeng Li, Anirban Mahanti, Jingx...
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