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WISA
2007
Springer
16 years 1 months ago
Iteration Bound Analysis and Throughput Optimum Architecture of SHA-256 (384, 512) for Hardware Implementations
Abstract. The hash algorithm forms the basis of many popular cryptographic protocols and it is therefore important to find throughput optimal implementations. Though there have be...
Yong Ki Lee, Herwin Chan, Ingrid Verbauwhede
ACSD
2006
IEEE
80views Hardware» more  ACSD 2006»
16 years 1 months ago
Schedulability Analysis of Petri Nets Based on Structural Properties
A schedule of a Petri Net (PN) represents a set of firing sequences that can be infinitely repeated within a bounded state space, regardless of the outcomes of the nondeterminis...
Cong Liu, Alex Kondratyev, Yosinori Watanabe, Albe...
DATE
2006
IEEE
125views Hardware» more  DATE 2006»
16 years 1 months ago
Combining simulation and formal methods for system-level performance analysis
Recent research on performance analysis for embedded systems shows a trend to formal compositional models and methods. These compositional methods can be used to determine the per...
Simon Künzli, Francesco Poletti, Luca Benini,...
FCCM
2006
IEEE
162views VLSI» more  FCCM 2006»
16 years 1 months ago
Power Visualization, Analysis, and Optimization Tools for FPGAs
This paper introduces the Low-Power Intelligent Tool Environment (LITE), an object oriented tool set designed for power visualization, analysis, and optimization. These tools lever...
Matthew French, Li Wang, Michael J. Wirthlin
FDL
2006
IEEE
16 years 1 months ago
Design Structure Analysis and Transaction Recording in SystemC
We present an introspection/reflection framework for SystemC which extracts design-relevant structure information and transaction data under any LRM-2.1 compliant simulation kern...
Wolfgang Klingauf, Manuel Geffken