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ICCAD
2001
IEEE
126views Hardware» more  ICCAD 2001»
16 years 3 months ago
Constraint Satisfaction for Relative Location Assignment and Scheduling
Tight data- and timing constraints are imposed by communication and multimedia applications. The architecture for the embedded processor imply resource constraints. Instead of ran...
Carlos A. Alba Pinto, Bart Mesman, Jochen A. G. Je...
BCI
2009
IEEE
16 years 1 months ago
On the Performance of SVD-Based Algorithms for Collaborative Filtering
—In this paper, we describe and compare three Collaborative Filtering (CF) algorithms aiming at the low-rank approximation of the user-item ratings matrix. The algorithm implemen...
Manolis G. Vozalis, Angelos I. Markos, Konstantino...
ICS
2009
Tsinghua U.
16 years 1 months ago
Cancellation of loads that return zero using zero-value caches
The speed gap between processor and memory continues to limit performance. To address this problem, we explore the potential of eliminating Zero Loads—loads accessing memory loc...
Md. Mafijul Islam, Sally A. McKee, Per Stenstr&oum...
FGCN
2007
IEEE
113views Communications» more  FGCN 2007»
16 years 26 days ago
Improving Disk Sector Integrity Using 3-dimension Hashing Scheme
To keep the evidence that a stored hard disk does not modify its content, the intuitive scheme is to calculate a hash value of the data in all the sectors in a specific order. Ho...
Zoe L. Jiang, Lucas Chi Kwong Hui, K. P. Chow, Siu...
CHES
2007
Springer
111views Cryptology» more  CHES 2007»
16 years 21 days ago
TEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks
Replay attacks are often the most costly attacks to thwart when dealing with off-chip memory integrity. With a trusted System-on-Chip, the existing countermeasures against replay r...
Reouven Elbaz, David Champagne, Ruby B. Lee, Lione...