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» On the Values of Reducibility Candidates
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FPGA
2010
ACM
209views FPGA» more  FPGA 2010»
16 years 3 months ago
FPGA power reduction by guarded evaluation
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
Chirag Ravishankar, Jason Helge Anderson
ACMMSP
2004
ACM
92views Hardware» more  ACMMSP 2004»
15 years 12 months ago
Instruction combining for coalescing memory accesses using global code motion
Instruction combining is an optimization to replace a sequence of instructions with a more efficient instruction yielding the same result in a fewer machine cycles. When we use it...
Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatan...
BMCBI
2010
131views more  BMCBI 2010»
15 years 6 months ago
Prediction of epigenetically regulated genes in breast cancer cell lines
Background: Methylation of CpG islands within the DNA promoter regions is one mechanism that leads to aberrant gene expression in cancer. In particular, the abnormal methylation o...
Leandro A. Loss, Anguraj Sadanandam, Steffen Durin...
BMCBI
2010
116views more  BMCBI 2010»
15 years 6 months ago
Optimization algorithms for functional deimmunization of therapeutic proteins
Background: To develop protein therapeutics from exogenous sources, it is necessary to mitigate the risks of eliciting an anti-biotherapeutic immune response. A key aspect of the ...
Andrew S. Parker, Wei Zheng, Karl E. Griswold, Chr...
JCB
2008
94views more  JCB 2008»
15 years 6 months ago
Prioritize and Select SNPs for Association Studies with Multi-Stage Designs
Large-scale whole genome association studies are increasingly common, due in large part to recent advances in genotyping technology. With this change in paradigm for genetic studi...
Jing Li